1. Technical Field
This disclosure relates to a multi-stacked package and a method of manufacturing the multi-stacked package. More particularly, the invention relates to a multi-stacked package having a plurality of packages that are physically and electrically connected to each other and are vertically stacked, and a method of manufacturing the multi-stacked package.
2. Description of the Related Art
In general, a semiconductor device is manufactured by a fabrication process for fabricating a semiconductor chip including an integrated circuit on a silicon substrate, an electrical die sorting (EDS) process for inspecting electrical characteristics of the semiconductor chip, and a packaging process for protecting the semiconductor chip.
Recently, the semiconductor devices for achieving a higher performance and a higher integration degree have been developed. Since the packaging technology may determine a size, a heat dissipation capacity, an electrical operation performance, a reliability and cost to manufacture the semiconductor device, an improved packaging technology is critically required for achieving the higher performance and the higher integration degree of the semiconductor device.
The packaging techniques have developed from a single inline package (SIP), a dual inline package (DIP), a quad flat package (QFP) and a ball grid array (BGA) in the order named. Recently, in order to improve a mounting efficiency per a unit volume, packaging technologies such as a chip scale package (CSP), a multi-chip package (MCP), a stacked-chip scale package (SCSP) and a wafer level chip scale package (WLCSP) have been disclosed. Further, a wafer level package (WLP) has been developed. According to the WLP, after semiconductor chips are mounted on a substrate, a series of assembling processes of die-bonding, molding, trimming and marking is carried out and then the substrate is cut to manufacture a semiconductor device.
As one of the recently developed packing techniques, a multi-stacked package (MSP) technology is disclosed. According to the MSP technology, a plurality of packages is vertically stacked on the substrate to scale down the semiconductor device.
Semiconductor devices manufactured by the MSP technology are disclosed in U.S. Pat. No. 6,894,378, issued to Johann, in which a stacked semiconductor chip includes an electronic component.
In the semiconductor devices having a multi-stacked package structure, a “so-called” solder joint reliability between a bottom package and a stack package positioned over the bottom package may be significantly important. Hereinafter, a conventional semiconductor device having the multi-stacked package structure is described in detail.
FIG. 1 is a cross-sectional view illustrating a conventional semiconductor device including a multi-stacked package structure.
Referring to FIG. 1, a semiconductor device 10 includes a mounting board 20, a first package 30 and a second package 40.
The first package 30 is positioned on the mounting board 20. The second package 40 is positioned on the first package 30. The first package 30 is fixed to the mounting board 20 using first solder balls 25. The second package 40 is mounted over the first package 30 using second solder balls 35. The first and second packages 30 and 40 are vertically stacked on the mounting board 20, thereby completing a multi-stack package.
Since the first and second packages 30 and 40 receive a power and a signal through the first and second solder balls 25 and 35, the first and second solder balls 25 and 35 need to be firmly and accurately secured to a correct position of the mounting board 20. However, the first and second solder balls 25 and 35 may be frequently separated from the correct position of the mounting board 20 due to temperature, humidity, mechanical impact from falling, or a load applied thereto. A deviation of the first and second solder balls 25 and 35 from the correct position of the mounting board 20 is known as a “ball open,” In the case of a “ball open,” the first package 30, the second package 40 or the semiconductor device 10 may malfunction or may not operate at all. That is, the performance of the semiconductor device 10 may depend on the solder joint reliability.
When the semiconductor device does not function properly due to a ball open, the resulting economic loss can be severe. Therefore, an improvement of the solder joint reliability in the semiconductor device is critical for the semiconductor industry.